In this project
The 4164 is a high-speed Dynamic Random Access Memory (DRAM) in a 16−Lead DIP type package organized as 65,536 words of one bit each. The refresh period is extended to 4 milliseconds, and during this period each of the 256 rows must be strobed with RAS in order to retain data. CAS can remain high during the refresh sequence to conserve power. All inputs and outputs, including clocks, are compatible with Series 74TTL. All address lines and data−in are latched on-chip to simplify system design. Data−out is unlatched to allow greater system flexibility. Pin1 has no internal connections to allow compatibility with other 64K RAMs using this pin for an additional function.
4164 Pinout
4164 Pin Configuration
| Pin No | Pin Name | Description |
|---|---|---|
| 1 | VBB | Supply Voltage |
| 2 | DIN | Data In |
| 3 | WRITE' | Read/Write Input |
| 4 | RAS' | Row Address Strobe |
| 5 | A0 | Address Pin 0 |
| 6 | A2 | Address Pin 2 |
| 7 | A1 | Address Pin 1 |
| 8 | GND | Ground Pin |
| 9 | VCC | Power Voltage |
| 10 | A5 | Address Pin 5 |
| 11 | A4 | Address Pin 4 |
| 12 | A3 | Address Pin 3 |
| 13 | A6 | Address Pin 6 |
| 14 | D OUT | Data Out |
| 15 | CAS' | Column Address Strobe |
| 16 | VSS | Ground Pin |
4164 Key Feature
- 65,536 x 1 Organization
- Single +5V Supply (10% Tolerance)
- Upward Pin Compatible with 4116 (16K Dynamic RAM)
- Max Access Time from RAS: Less than 150ns
- Min Cycle Time (Read or Write): Less than 260ns
- Long Refresh Period: 4 milliseconds
- Low Refresh Overhead Time: As Low As 1.8% of Total Refresh Period
- All Inputs, Outputs, Clocks Fully TTL Compatible
- 3−State Unlatched Outputs
You can download this datasheet for 4164 64k Video RAM - Datasheet from the link given below:
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